/projects/cubeos/src_current/drivers/hardware/RCJ.c Source File

00001 /*  src_experimental/drivers/hardware/RCJ.c
00002 
00003    CubeOS Version 0.4.90 experimental
00004    Copyright (C) 1999,2000 Holger Kenn
00005 
00006    CubeOS is free software; you can redistribute it and/or
00007    modify it under the terms of the GNU Library General Public
00008    License as published by the Free Software Foundation; either
00009    version 2 of the License, or any later version.
00010 
00011    CubeOS is distributed in the hope that it will be useful,
00012    but WITHOUT ANY WARRANTY; without even the implied warranty of
00013    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
00014    Library General Public License for more details.
00015 
00016  */
00017 #include <cubeos.h>
00018 #include <mc68332.h>
00019 
00020 /* this is the init function for the RCJ hardware. */
00021 
00022 int RCJ_init ()
00023 {
00024 #ifdef RCJ_BASE
00025 
00026 #ifndef RCJ_BLOCK
00027 #define RCJ_BLOCK 0 /* equals 2k blocksize */
00028 #endif
00029         if ((RCJ_BASE) != 0) {
00030                 
00031 
00032                 unsigned short v;
00033 
00034                 writeshort (SIM_CSBAR3, ((RCJ_BASE >> 8) & 0xfff8) | (RCJ_BLOCK & 0x0007)  );           /* Blocksize 0=2k */
00035                 writeshort (SIM_CSOR3, 0x7d3e);         
00036                         /* ASYNC,H+L,RW,DS,4 wait, S+U SP */
00037                 /* 0111 1101 0011 1110 */ /* 4 waitstates = 7d3e */
00038                 /* 7    d    3    e */    /* 0 waitstates = 7c3e */
00039                 v = readshort (SIM_CSPAR0);
00040                 v |= 0x300;
00041 //      v &= 0xfeff;
00042                 writeshort (SIM_CSPAR0, v);     /* enables CS3 as 16 bit port */
00043 
00044                 return 0;
00045         } else {
00046                 return (-1);
00047         }
00048 
00049 #else
00050         return -1;
00051 #endif
00052 
00053 }
00054 
00055 int RCJ_slow()
00056 {
00057 #ifdef RCJ_BASE
00058         if ((RCJ_BASE) != 0) {
00059                 writeshort (SIM_CSOR3, 0x7d3e); 
00060                 return 0;
00061         }
00062 #endif
00063         return -1;
00064 
00065 }
00066 
00067 int RCJ_fast()
00068 {
00069 #ifdef RCJ_BASE
00070         if ((RCJ_BASE) != 0) {
00071                 writeshort (SIM_CSOR3, 0x7c3e);         
00072                 return 0;
00073         }
00074 #endif
00075         return -1;
00076 }
00077